A couple of weeks ago Linaro hosted an HPC Workshop at Huawei’s offices in Santa Clara with coffee breaks and lunch sponsored by HiSilicon and an afternoon reception sponsored by Arm. If you are interested in HPC and were unable to make this workshop, we will be organising additional ones in the not too distant future so do follow us on social media for updates. In the meantime, make sure to join us at Linaro Connect Vancouver 2018 where we have several HPC discussions lined up. You can read about these further down in the blog. To register for Linaro Connect click here.
Back to the HPC Workshop:
We had a packed schedule with presentations from University of Bristol, Arm, Cavium, Huawei, Linaro, Mellanox, Riken, Sandia, SUSE and Red Hat. Below we have listed a summary of the topics presented - we are in the process of getting all the presentation decks uploaded under the Resource tab here. They will all be made available shortly but if you cannot find what you are looking for, please email firstname.lastname@example.org.
Isambard: the world’s first production Arm-based supercomputer
Prof. Simon McIntosh-Smith from the University of Bristol shared details on Isambard: The world’s first production 64-bit Arm supercomputer.
Vanguard Astra - Petascale ARM Platform for U.S. DOE/ASC Supercomputing
Sandia National Labs focused on Vanguard Astra, a prototype petascale Arm computer, the architectural details of Astra and the significant investments being made towards the maturing of the Arm software ecosystem.
Post-K and Arm HPC Ecosystem
Prof. Yutaka Ishikawa from Riken presented Post-K, a flagship supercomputer in Japan being developed by Riken and Fujitsu. It will be the first supercomputer with Armv8-A+SVE!
Intelligent Interconnect Architecture to Enable Next Generation HPC
The importance of intelligent interconnect architecture to enable next generation HPC was addressed by Gilad Shainer from Mellanox. The combination of In-Network Computing and Arm based processors offer a rich set of capabilities and opportunities to build the next generation of HPC platforms.
HPC network stack on ARM & Cross Platform Performance Engineering
Arm presented two topics MPI and a methodology for porting HPC applications to Arm, and the ecosystem of cross platform performance engineering toolkits and libraries that is currently available on Arm.
Optimizing for ARM64—A Toolchain Perspective
Optimised tooling is crucial and will always remain important to HPC. Cavium discussed optimising for ARM64 from a toolchain perspective.
Red Hat and Suse shared details on their distributions for use for HPC.
Huawei’s requirements for the ARM based HPC solution readiness
Huawei discussed the drive needed from hardware vendors, software vendors, cloud providers and Arm to speed up the adoption of Arm based HPC solutions
OpenHPC Automation with Ansible & Setting up an SVE developer environment
Finally Renato Golin and Alex Bennée (Linaro) spoke about Ansible on openHPC and SVE on QEMU respectively. You can find Alex’s blog on SVE at this link
All in all, it turned out to be a very informative event covering a broad range of aspects, which resulted in lots of good technical discussion.
“Thank you for putting on a great event at Huawei, there were excellent topics, insights and most importantly top notch networking opportunities.” Jeff ErnstFriedman, Program Manager, OpenHPC (a Linux Foundation Collaborative Project)
Thank you to our speakers and attendees for joining the workshop. And thank you to our Sponsors HiSilicon and Arm for helping us make it happen!
Make sure to join us in six weeks time at Linaro Connect Vancouver 2018 where we will continue discussions around HPC. Here are some tasters of what to expect…
HPC Sessions at Linaro Connect Vancouver 2018
Monday 17 September, 16.00-16.25
The HPC group has been working on a number of HPC focused optimisations in LLVM and collaborating with TCWG to agree on benchmarks and results analysis. LLVM has reached a sufficient level as a compiler for system programming. However, there are several problems as compilers for HPC applications. In this report, we show the deficiency of LLVM as an HPC compiler and propose an improvement plan for them. We also report on some of our work related to it, which include activating software pipelining for AArch64, optimizing the control flow graph for HPC applications, improving register allocation for kernel parts of HPC applications, and so on.
Tuesday 18 September, 10.00-10.25
Discussion on the design decisions of the HPC lab: goals, implementation, automation. Current and future plans to grow in size and scope: more different hardware, supporting more communities (OpenMPI, etc).
Tuesday 18 September 2018, 11.00-11.25
SVE (Scalable Vector Extension) is the next generation SIMD instruction set for Armv8-a which looks to be promising for Java use cases like web applications and big data applications. We will have a brief introduction of SVE and update the current status on the SVE enabling work in OpenJDK and future plans
Linaro HPC Sig
The world’s fastest 500 computers run Linux-based operating systems and thus, High Performance Computing (HPC) relies on Open Source. In 2016, Linaro and its members therefore created the HPC Special Interest Group (SIG) to drive the adoption of Arm in HPC through standardisation, interoperability, orchestration and use case development. To find out more about the Linaro HPC Sig and how to get involved, click here.
By Ebba Simpson, Marketing Manager and Kanta Vekaria, Director of HPC, Linaro