Two weeks to go to the HPC Workshop!

We are pleased to share the program for our HPC Workshop, which is free to attend. Some of HPC’s leading experts will be presenting on a variety of topics, from the world’s first production Arm-based supercomputer to Post-K. The packed schedule will provide lots of different perspectives and input from a wide range of companies and organisations, including Arm, Cavium, Huawei, Linaro, Mellanox, Riken, Sandia, SUSE and the University of Bristol.

See below some of the highlights you can expect. Did we mention it is free to attend?

Register here: /events/arm-hpc-santa-clara-2018/

Isambard: the world’s first production Arm-based supercomputer

The Isambard supercomputer is due to be the world’s first production, Arm-based system when it goes online in the summer of 2018. The project, run by the GW4 alliance and the UK’s Met Office, has already produced significant results using early access systems based on Cavium ThunderX2 CPUs. The production Isambard system will be a Cray XC50, complete with Cray’s software toolchain ported to Arm. Isambard’s early results compare the two most common open-source compilers - GNU and LLVM - with Cray’s compiler. Early results suggest that Cavium ThunderX2 CPUs are performance competitive with the latest x86 CPUs, while delivering compelling performance per dollar advantages. Our experience has also been that porting complex production codes of millions of lines of legacy code is relatively painless, a significant achievement for the Arm software ecosystem. However, there are still some areas where improvement is required, and we shall highlight those in this talk.

Speaker: Simon McIntosh-Smith, Professor of High Performance Computing, University of Bristol in the UK

Vanguard Astra - Petascale ARM Platform for U.S. DOE/ASC SupercomputingThe Vanguard program looks to expand the potential technology choices for leadership-class High Performance Computing (HPC) platforms, not only for the National Nuclear Security Administration (NNSA) but for the Department of Energy (DOE) and wider HPC community. Specifically, there is a need to expand the supercomputing ecosystem by investing and developing emerging, yet-to-be-proven technologies and address both hardware and software challenges together, as well as to prove-out the viability of such novel platforms for production HPC workloads. The first deployment of the Vanguard program will be Astra, a prototype Petascale ARM supercomputer to be sited at Sandia National Laboratories during 2018. This talk will focus on the arthictecural details of Astra and the significant investments being made towards the maturing the ARM software ecosystem. Furthermore, we will share initial performance results based on our pre-general availability testbed system and outline several planned research activities for the machine.”

Speaker: Andrew J. Younge, R&D Computer Scientist, Sandia National Laboratories

Post-K and Arm HPC Ecosystem

Post-K, a flagship supercomputer in Japan, is being developed by Riken and Fujitsu. It will be the first supercomputer with Armv8-A+SVE. This talk will give an overview of Post-K and how RIKEN and Fujitsu are currently working on software stack for an Arm architecture.

Speaker: Yutaka Ishikawa, Project Leader of FLAGSHIP 2020 project, Riken

Intelligent Interconnect Architecture to Enable Next Generation HPC

The latest revolution in HPC interconnect architecture is the development of In-Network Computing, a technology that enables handling and accelerating application workloads at the network level. By placing data-related algorithms on an intelligent network, we can overcome the new performance bottlenecks and improve the data center and applications performance. The combination of In-Network Computing and ARM based processors offer a rich set of capabilities and opportunities to build the next generation of HPC platforms.

Speakers: Gilad Shainer, Vice President of Marketing & Scot Schultz, HPC Technology Specialist, Mellanox

HPC network stack on ARM

Applications, programming languages, and libraries that leverage sophisticated network hardware capabilities have a natural advantage when used in today¹s and tomorrow’s high-performance and data center computer environments. Modern RDMA based network interconnects provides incredibly rich functionality (RDMA, Atomics, OS-bypass, etc.) that enable low-latency and high-bandwidth communication services. The functionality is supported by a variety of interconnect technologies such as InfiniBand, RoCE, iWARP, Intel OPA, Cray¹s Aries/Gemini, and others. Over the last decade, the HPC community has developed variety user/kernel level protocols and libraries that enable a variety of high-performance applications over RDMA interconnects including MPI, SHMEM, UPC, etc. With the emerging availability HPC solutions based on ARM CPU architecture it is important to understand how ARM integrates with the RDMA hardware and HPC network software stack. In this talk, we will overview ARM architecture and system software stack, including MPI runtimes, OpenSHMEM, and OpenUCX.

Pavel Shamis, Principal Research Engineer, Arm

It just keeps getting better - SUSE enablement for Arm

SUSE has been delivering commercial Linux support for Arm based servers since 2016. Initially the focus was on high end servers for HPC and Ceph based software defined storage. But we have enabled a number of other Arm SoCs and are even supporting the Raspberry Pi. This session will cover the SUSE products that are available for the Arm platform and view to the future.

Speaker: Jay Kreumcke, responsible for Linux server products for High Performance Computing, SUSE

Optimizing for ARM64—A Toolchain Perspective

Optimizing for ARM64 has some unique features that optimization for x86 does not. We will describe what those features are, including:

  • Importance of having latest tools and libraries
  • Using existing optimizations as a guide to optimizing for ARM64
  • Configuring tools for best optimization results
  • Current status of HPC library and application performance
  • Effects of hardware and configuration considerations
  • Our experiences with various optimization techniques on numerous HPC applications and libraries

Speaker: Joel Jones, Leader of Toolchain, Cavium

Cross Platform Performance Engineering

High performance application tuning – performance engineering – relies heavily on tools for profiling, debugging, and visualization. This talk will present a methodology for porting HPC applications to Arm, and the ecosystem of cross platform performance engineering toolkits and libraries that is currently available on Arm. An overview and use cases for Arm Forge, PAPI, ScoreP, TAU and others will be provided along with guidance and advice for HPC performance engineering on the latest Arm-based CPU offerings.

Speaker: Ryan Hulguin, HPC Applications & Support Specialist, Arm

We hope to see you there!